PLL frequency synthesizer tutorial

- an introduction or tutorial to the essentials of phase locked loop, PLL frequency synthesizer operation and design

This phase modulation, PM tutorial is split into several pages each of which addresses different aspects of phase modulation operation and technology:

PLL frequency synthesizers are widely used in all forms of radio communications equipment today. From cellular phones to all forms of wireless products and domestic radios and televisions to professional radio communications equipment, the local oscillators virtually all use PLL frequency synthesizers.

PLL frequency synthesizers offer very many advantages over the use of other forms of local oscillator. Frequency synthesizers not only offer high levels of stability and accuracy (determined by the reference which is normally a crystal oscillator); they are also easy to control from digital circuitry such as microprocessors. This enables facilities such as keypad frequency entry, channel memories and more to be implemented.

In view of all their advantages, PLL frequency synthesizers are usually the preferred form of local oscillator for most applications. Accordingly synthesizers are included in many radio chip-sets from cellular phones to radio and televisions.

PLL Basics

Most frequency synthesizers are based around a phase locked loop or PLL. The PLL uses the idea of phase comparison as the basis of its operation. From the block diagram of a basic loop shown below, it can be seen that there are three basic circuit blocks, a phase comparator, voltage controlled oscillator, and loop filter. A reference oscillator is sometimes included in the block diagram, although this is not strictly part of the loop itself even though a reference signal is required for its operation.

The phase locked loop, PLL, operates by comparing the phase of two signals. The signals from the voltage controlled oscillator and reference enter the phase comparator Here a third signal equal to the phase difference between the two input signals is produced.

The phase difference signal is then passed through the loop filter. This performs a number of functions including the removal of any unwanted products that are present on this signal. Once this has been accomplished it is applied to the control terminal of the voltage controlled oscillator. This tune voltage or error voltage is such that it tries to reduce the error between the two signals entering the phase comparator. This means that the voltage controlled oscillator will be pulled towards the frequency of the reference, and when in lock there is a steady state error voltage. This is proportional to the phase error between the two signals, and it is constant. Only when the phase between two signals is changing is there a frequency difference. As the phase difference remains constant when the loop is in lock this means that the frequency of the voltage controlled oscillator is exactly the same as the reference.

PLL frequency synthesizer basics

A phase locked loop, PLL, needs some additional circuitry if it is to be converted into a frequency synthesizer. This is done by adding a frequency divider between the voltage controlled oscillator and the phase comparator as shown below.

Programmable dividers or counters are used in many areas of electronics, including many radio frequency applications. They take in a pulse train like that below, and give out a slower train. In a divide by two circuit only one pulse is given out for every two that are fed in and so forth. Some are fixed, having only one division ratio. Others are programmable and digital or logic information can be fed into them to set the division ratio.

When the divider is added into the circuit the phase locked loop, PLL, still tries to reduce the phase difference between the two signals entering the phase comparator. Again when the circuit is in lock both signals entering the comparator are exactly the same in frequency. For this to be true the voltage controlled oscillator must be running at a frequency equal to the phase comparison frequency times the division ratio.

It can be seen that if the division ratio is altered by one, then the voltage controlled oscillator will have to change to the next multiple of the reference frequency. This means that the step frequency of the synthesizer is equal to the frequency entering the comparator.

Most synthesizers need to be able to step in much smaller increments if they are to be of any use. This means that the comparison frequency must be reduced. This is usually accomplished by running the reference oscillator at a frequency of a megahertz or so, and then dividing this signal down to the required frequency using a fixed divider. In this way a low comparison frequency can be achieved.

Analogue PLL frequency synthesizers

Placing a digital divider is not the only method of making a synthesizer using a phase locked loop, PLL. It is also possible to use a mixer in the loop. Using this technique places an offset into the frequency generated by the loop.

The way in which the phase locked loop, PLL, operates with the mixer incorporated can be analyzed in the same manner that was used for the loop with a divider. When the loop is in lock the signals entering the phase detector are at exactly the same frequencies. The mixer adds an offset equal to the frequency of the signal entering the other port of the mixer. To illustrate the way this operates figures have been included. If the reference oscillator is operating at a frequency of 10 MHz and the external signal is at 15 MHz then the VCO must operate at either 5 MHz or 25 MHz.. Normally the loop is set up so that mixer changes the frequency down and if this is the case then the oscillator will be operating at 25 MHz.

It can be seen that there may be problems with the possibility of two mix products being able to give the correct phase comparison frequency. It happens that as a result of the phasing in the loop, only one will enable it to lock. However to prevent the loop getting into an unwanted state the range of the VCO is limited. For phase locked loops, PLLs, that need to operate over a wide range a steering voltage is added to the main tune voltage so that the frequency of the loop is steered into the correct region for required conditions. It is relatively easy to generate a steering voltage by using digital information from a microprocessor and converting this into an analogue voltage using a digital to analogue converter (DAC). The fine tune voltage required to pull the loop into lock is provided by the loop in the normal way.

Multi-loop synthesizers

Many high performance synthesizers use several loops that incorporate both mixers and digital dividers. By using these techniques it is possible to produce high performance wide range signal sources with very small step sizes. If only a single loop is used then there may be short falls in the level of performance.

There is a large variety of ways in which multi-loop synthesizers can be made, dependent upon the requirements of the individual system. However as an illustration a two loop system used as an example. This uses one loop to give the smaller steps and the second provides larger steps. This principle can be expanded to give wider ranges and smaller steps.

The first phase locked loop, PLL, has a digital divider and operates over the range 19 to 28 MHz. Having a reference frequency of 1 MHz it provides steps of 1 MHz. The signal from this loop is fed into the mixer of the second one. The second loop has division ratios of 10 to 19, but as the reference frequency has been divided by 10 to 100 kHz to give smaller steps.

The operation of the whole loop can be examined by looking at extremes of the frequency range. With the first loop set to its lowest value the divider is set to 19 and the output from the loop is at 19 MHz. This feeds into the second loop. Again this is set to the minimum value and the frequency after the mixer must be at 1.0 MHz. With the input from the first loop at 19 MHz this means that the VCO must operate at 20 MHz if the loop is to remain in lock.

At the other end of the range the divider of the first loop is set to 28, giving a frequency of 28 MHz. The second phase locked loop, PLL, has the divider set to 19, giving a frequency of 1.9 MHz between the mixer and divider. In turn this means that the frequency of the VCO must operate at 29.9 MHz. As the phase locked loops, PLLs, can be stepped independently it means that the whole synthesizer can move in steps of 100 kHz between the two extremes of frequency. As mentioned before this principle can be extended to give greater ranges and smaller steps, providing for the needs of modern receivers.

Summary

PLL frequency synthesizers are particularly flexible to use and to be controlled by digital commands. In addition to this they offer many distinct advantages over other forms of local oscillator for many applications both in radio communications equipment as well as test equipment, etc. As a result PLL frequency synthesizers are widely used for many RF applications. Even though other forms of generator including Direct Digital Synthesizers are available, the PLL based synthesizer is has many advantages, and can often be used in conjunction with other generators including DDS circuits.

Further pages from this tutorial
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