DRAM Memory Technology Tutorial

- an overview or tutorial covering the basics of DRAM memory technology, a form of semiconductor memory widely used in many computer and electronics processor applications.

This overview of the different types of semiconductor memory is split into several pages, each addressing a different semiconductor memory type or technology:

Dynamic RAM is a form of random access memory, RAM. It is widely used in PCs and other processor based systems as the basic form of working memory within the system. Although a variety of other different types of semiconductor memory that are available, DRAM was one of the major types to be used in view of its speed of operation. While DRAM is still used, other flavours of semiconductor memory including SRAM are faster and have become more widely used.

DRAM memory basics

DRAM memory have MOS technology at the heart of their design, fabrication and operation. The DRAM memory cell uses a capacitor to store each bit of data. The level of charge on the memory cell capacitor determines whether that particular bit is a logical "1" or "0".

The typical DRAM memory cell consists as shown of a single field effect transistor and a capacitor. The two lines, the Word Line and the Bit Line connect as shown so that the required but within the memory can be selected to be read or written to.

One of the problems with this arrangement is that the capacitors do not hold their charge indefinitely as there is some leakage across the capacitor. It would not be acceptable for the memory to loose its data, and to overcome this problem the data is refreshed periodically. The data is sensed and written and this then ensures that any leakage is overcome, and the data is re-instated.

The basic memory cell shown would be one of many thousands or millions of such cells in a complete memory chip. In these chips there are two basic lines used. One (as shown) is known as the Word Line, and is generally shown as connecting rows of the memory cells together. The other connecting columns is known as the Bit Line. Each column is actually composed of two bit lines, each one connected to every other storage cell in the column. These are generally known as the "+" and " - " bit lines. A sense amplifier is essentially a pair of cross-connected inverters between the bit lines. That is, the first inverter is connected from the + bit line to the - bit line, and the second is connected from the - bit line to the + bit line. This system provides a method of ensuring the data is not corrupted.

DRAM refreshing

One of the key elements of DRAM memory is the fact that the data is refreshed periodically to overcome the fact that charge on the storage capacitor leaks away and the data would disappear after a short while. Typically manufacturers specify that each row should be refreshed every 64 ms. This time interval falls in line with the JEDEC standards for dynamic RAM refresh periods.

There are a number of ways in which the refresh activity can be accomplished. Some processor systems refresh every row together once every 64 ms. Other systems refresh one row at a time, but this has the disadvantage that for large memories the refresh rate becomes very fast. Some other systems (especially real time systems where speed is of the essence) adopt an approach whereby a portion of the semiconductor memory at a time based on an external timer that governs the operation of the rest of the system. In this way it does not interfere with the operation of the system.

Whatever method is use, there is a necessity for a counter to be able to track the next row in the DRAM memory is to be refreshed. Some DRAM chips include a counter, otherwise it is necessary to include an additional counter for this purpose.

It may appear that the refresh circuitry required for DRAM memory would over complicate the overall memory circuit making it more expensive. However it is found that DRAM the additional circuitry is not a major concern if it can be integrated into the memory chip itself. It is also found that DRAM memory is much cheaper and has a much greater capacity than the other major contender which might be Static RAM (SRAM).

DRAM size considerations

One important element within the design of DRAM memory chips is the signal to noise ratio. This depends upon the ratio of the capacitance of the storage capacitor within the DRAM memory to the capacitance of the Word or Bit line on which the charge is dumped when the cell is accessed. As the bit density per chip is increased, the ratio is degraded since the cell area is decreased as more cells are added on the bit line. It is for this reason that it is important to store as high a voltage on the cell capacitor, and also to increase the capacitance of the DRAM storage capacitor for a given areas as much as possible.

This is a very important consideration because sensing the small charge on the memory cell capacitor is one of the most challenging areas of the DRAM memory chip design. As a result of this some elaborate circuit designs have been incorporated onto DRAM memory chips.

Summary

DRAM memory is a particularly important type of electronics component in today's electronics and computer technology scene. The DRAM memory allows fast and dense memories to be made that are suitable for use with many processor and computer applications. More recently other forms of DRAM, notably the SDRAM have improved the basic technology and enable greater levels of speed and density to be achieved in line with the requirements of modern computing technology. As a result these newer forms of semiconductor memory are now more widely used that the more traditional DRAM chips. Nevertheless DRAM memory chips are still be produced in very large quantities and used in many new applications.

Further pages from this tutorial
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