Understanding FET Specifications

- in order to choose the correct FET for any application it is necessary to understand its specifications and how they are presented in datasheets. In this way the correct FET can be selected.

There are many specifications that define the parameters of a FET.

This data is available in the FET datasheets, but these specifications are not always defined, or if they are defined, they are not always explained in an understandable fashion.

As might be expected, there are many different specifications in FET datasheets that define the performance of devices. These range from the factors governing the amplification that can be achieved, to other parameters defining the resistance of the channel, to further data that defines aspects such as the maximum voltage levels, maximum current, the input resistance, capacitance and much more.

All the specifications and parameters are important in different applications. Also dependent upon the device, the FET datasheets may quote different parameters which are relevant to the particular for which the device is intended.

Main FET specifications

Some of the main FET specifications used in datasheets are defined below. Some of the parameters are particularly important for different types of FET, e.g. JFET while others may be more applicable to the MOSFET, etc.

  • Gate source voltage, VGS :   The FET parameter VGS is the rating for the maximum voltage that can be tolerated between the gate and source terminals. The purpose for including this parameter in the data sheet is to prevent damage of the gate oxide. The actual gate oxide withstand voltage is typically much higher than this but it varies as a result of the tolerances that exist in the manufacturing processes. It is advisable to remain well within this rating so that the reliability of the device is maintained. Often many design rules indicate that the device should only be run to 60 or 70% of this rating.
  • Drain-Source Voltage, VDSS:   This is a rating for the maximum drain-source voltage that can be applied without causing avalanche breakdown. The parameter is normally stated for the case where the gate is shorted to the source and for a temperature of 25°C. Depending on temperature, the avalanche breakdown voltage could actually be less than the VDSS rating.

    When designing a circuit, it is always best to leave a significant margin between the maximum voltage to be experienced and the VDSS specification. Often they may be run at around 50% VDSS to ensure reliability.
  • Threshold voltage VGS(TH) :   The threshold voltage VGS(TH) is the minimum gate voltage that can form a conducting channel between the source and the drain. It is normally quoted for a given source drain current.
  • Gate reverse leakage current , Igss:  
  • Gate source cut-off voltage , VGS(off):   The gate source cut-off voltage is really a turn-off specification. It defines the threshold voltage for a given residual current, so the device is basically off but on the verge of turning on. The threshold voltage has a negative temperature coefficient, i.e. it decreases with increasing temperature. This temperature coefficient also affects turn-on and turn-off delay times which has an impact on some circuits.
  • Drain current at zero gate voltage , Idss :   This FET parameter is the maximum continuous current the device can carry with the device fully on. Normally it is specified for a particular temperature, typically 25°C.

    This FET specification is based on the junction-to-case thermal resistance rating RθJC (junction / channel temperature) and the case temperature.

    This FET parameter is of particular interest for power MOSFETs and when determining the maximum current parameter no switching losses are accounted for. Also holding the case at 25°C is not feasible in practice. As a result the actual switching current should be limited to less than half of the Idss at TC = 25°C rating in a hard switched application. Values ofa third to a quarter are commonly used.
  • Forward transconductance, Gfs :  
  • Input capacitance, Ciss :   The input capacitance parameter for a FET is the capacitance that is measured between the gate and source terminals with the drain shorted to the source for AC signals. In other words this is effectively the capacitance between the gate and channel. Ciss is made up of the gate to drain capacitance Cgd in parallel with the gate to source capacitance Cgs. This can be expressed as:

    Ciss = Cgs + Cgd
  • Drain-source on resistance, Rds(on) :   With the FET turned hard on, this is the resistance in ohms exhibited across the channel between the drain and source. It is particularly important in switching applications from logic to power switching as well as in RF switching, including applications in mixers.
  • Power dissipation, Ptot :   This FET specification is the maximum continuous power the device can dissipate. It is normally specified in free standing in air, or with the base held at a given temperature, typically 25°C. The actual conditions, whether held in a heat-sink, or in free air will depend upon the device types and the manufacturer.

By Ian Poole


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