25 Sep 2018

Lattice expands ultra-low power sensAI stack

Lattice Semiconductor has unveiled expanded features of the company’s Lattice sensAI stack designed to speed time-to-market for developers of flexible machine learning inferencing in consumer and industrial IoT applications.

Building on the ultra-low power (1 mW-1 W) focus of the sensAI stack, Lattice is releasing new IP cores, reference designs, demos and hardware development kits that provide scalable performance and power for always-on, on-device artificial intelligence (AI) applications.

“Flexible, low-power, always-on, on-device AI is increasingly a requirement in edge devices that are battery operated or have thermal constraints. The new features of the sensAI stack are optimized to address this challenge, delivering improved accuracy, scalable performance, and ease-of-use, while still consuming only a few milliwatts of power,” said Deepak Boppana, Senior Director, Product and Segment Marketing, Lattice Semiconductor. “With these enhancements, sensAI solutions can now support a variety of low-power, flexible system architectures for always-on, on-device AI.”

Examples of the architectural choices that sensAI solutions enable include:

  • Stand-alone iCE40 UltraPlus / ECP5 FPGA based always-on, integrated solutions, with latency, security, and form factor benefits.

  • Solutions utilizing iCE40 UltraPlus as an always-on processor that detects key-phrases or objects, and wakes-up a high performance AP SoC / ASIC for further analytics only when required, reducing overall system power consumption.

  • Solutions utilizing the scalable performance/power benefits of ECP5 for neural network acceleration, along with IO flexibility to seamlessly interface to on-board legacy devices including sensors and low-end MCUs for system control.

Updates to the sensAI stack include:

  • IP Cores – New CNN Compact Accelerator IP core for improved accuracy on iCE40 UltraPlus FPGA, and enhanced CNN Accelerator IP core for improved performance on ECP5 FPGAs

  • Software Tools – Updated neural network compiler tool with improved ease-of-use and both Caffe and TensorFlow support for iCE40 UltraPlus FPGAs

  • Reference Designs – New human presence detection and hand gesture recognition reference designs and demos

  • Modular Hardware Platforms – New iCE40 UltraPlus development platforms including Himax HM01B0 UPduino Shield, and DPControl iCEVision Board

  • Design Service Partners – New vehicle classification and package detection demos from sensAI Design Services Partners

The Lattice sensAI partner eco-system continues to expand worldwide with new design service and IP partners focused on enabling smart home, smart factory, smart city, and smart car applications.

“Lattice’s low power, small size FPGAs and neural network IP cores and tools, will significantly accelerate adoption of artificial intelligence at the edge,” said Amit Vashi, Chief Operating Officer, Softnautics, a sensAI Design Services partner. “With our expertise in machine learning, we are proud to be working closely with Lattice to enable sensAI solution deployments as evident by our jointly developed vehicle classification demo using ECP5 FPGAs”.

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