ARM Architecture

- details about the ARM processor architecture and how it is used to provide effective, efficient low power computing.

AMR processor tutorial includes

The ARM processor architecture forms the basis of all ARM processors

Although the ARM architecture has evolved over time, it still adopts the same basic processor architecture adopted by the early ARM devices.

ARM architecture cores

ARM Architecture Cores List
ARM Architecture Bit Width Cores Designed by ARM Holdings
ARMv1 32 / 26 ARM1
ARMv2 32 / 26 ARM2, ARM3
ARMv3 32 ARM6, ARM7
ARMv4 32 ARM8
ARMv6 32 ARM11
ARMv6M 32 ARM Cortex-M0, ARM Cortex-M0+, ARM Cortex-M1
ARMv7M 32 ARM Cortex-M3
ARMv7EM 32 ARM Cortex-M4
ARMv7-R 32 ARM Cortex-R4, ARM Cortex-R5, ARM Cortex-R7
ARMv7A 32 ARM Cortex-A5, ARM Cortex-A7, ARM Cortex-A8, ARM Cortex-A9, ARM Cortex-A12, ARM Cortex-A15, ARM Cortex-A17
ARMv8A 64/32 ARM Cortex-A53, ARM Cortex-A57
ARMv8R 32  

The ARM architecture has evolved over time. ARM architecture, ARMv7, defines the architecture for the first of the Cortex series of cores, for which there are three architecture "profiles".

  • A-profile:   Application profile relates to Cortex-A series.
  • R-profile:   Real-time profile relates to Cortex-R series.
  • M-profile:   Microcontroller profile relates to Cortex-M series.

The ARM architecture supports implementations across a wide range of performance points, establishing it as the leading architecture in many market segments. The ARM architecture supports a very broad range of performance points leading to very small implementations of ARM processors, and very efficient implementations of advanced designs using state of the art micro-architecture techniques. Implementation size, performance, and low power consumption are key attributes of the ARM architecture.

ARM developed architecture extensions to provide support for Java acceleration (Jazelle), security (TrustZone), SIMD, and Advanced SIMD (NEON) technologies. The ARMv8-architecture adds a Cryptographic extension as an optional feature. The ARM architecture is similar to a Reduced Instruction Set Computer (RISC) architecture, as it incorporates these typical RISC architecture features:

A uniform register file load/store architecture, where data processing operates only on register contents, not directly on memory contents.

Simple addressing modes, with all load/store addresses determined from register contents and instruction fields only.

Enhancements to a basic RISC architecture enable ARM processors to achieve a good balance of high performance, small code size, low power consumption and small silicon area.

By Ian Poole

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