- overview or tutorial about the basics and essential details of the UMOS technology, the UMOS Field Effect Transistor or UMOSFET used in many applications to give higher power performance than traditional FETs.

The UMOS field effect transistor or UMOSFET is a form of vertical or "trench" style structure used for MOS transistors. This form of semiconductor "trench" or vertical semiconductor technology offers significant advantages in terms of speed and lowering the ON resistance. As a result many manufacturers of semiconductor electronics components offer vertical forms of structure for their MOS transistors.

The UMOS transistor is very similar to the VMOS FET. It is a slightly later development of the same basic principle. UMOSFETs are able to provide a useful function in many relatively high power applications, both in power supplies and as RF power transistors.

UMOSFET structure

It can be seen from the diagram of the structure of the UMOS FET, that it is very similar to that of the VMOS FET. The main difference is that the bottom of the V is flattened out to give it a U shape - hence the name UMOS.

As with the VMOS FET, where the structure is very similar, the most striking point about the new device is the "U" groove in the structure which is the key to the operation of the device. The "U" groove performs the same function as the "V" groove found in VMOS FETs.

It can be seen that the source is at the top of the device, and the drain is at the bottom. Instead of flowing horizontally as in the standard FET, current in this device flows vertically.

UMOSFET or UMOS field effect transistor structure showing the U well that gives it the performance it has
UMOSFET or UMOS field effect transistor structure

The device uses two connections for the source and accordingly there is a much large area through which the current can flow. This reduces the ON resistance of the device allowing it to handle much higher powers than conventional FETs.

The gate consists of a metallised area over the "U" groove and this controls the current flow in the P region of the UMOSFET. As the gate is fabricated in this way it means that the UMOS FET retains the exceptionally high input resistance typical of the MOS family of devices.

By Ian Poole

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Securing the future of IoT
Co-authored by Bernd Hantsche, Head of the GDPR Team of Excellence and Marketing Director Embedded & Wireless and Richard Ward, ‎Semiconductor Marketing Manager at Rutronik. is operated and owned by Adrio Communications Ltd and edited by Ian Poole. All information is © Adrio Communications Ltd and may not be copied except for individual personal use. This includes copying material in whatever form into website pages. While every effort is made to ensure the accuracy of the information on, no liability is accepted for any consequences of using it. This site uses cookies. By using this site, these terms including the use of cookies are accepted. More explanation can be found in our Privacy Policy