Transistor Capacitance Multiplier Circuit

- when large capacitors are not always viable, this circuit enables a much large level of effective capacitance to be implemented using a small capacitor and a transistor

The concept of the transistor capacitance multiplier circuit is quite straightforward.

The capacitance multiplier circuit is easy to use and find many applications in circuits where high levels of performance are required and cost and space are limiting factors.

In particular the circuit is important in areas where good noise performance is paramount. It is often found that many linear voltage regulators, or even switch mode regulators can generate high levels of noise.

In many circuits, good noise performance is paramount. For example in RF circuits using phase locked loops low phase noise is often crucial, especially where data is transmitted using phase modulation. Any noise on the power supply can manifest itself as phase noise, which in tern results in increase bit error rates.

Data acquisition systems also require very low noise in power rails. High resolution digital to analogue converters require low noise rails otherwise the noise can exceed the D2A resolution negating the high performance and resolution levels.

Also in high fidelity audio systems, noise performance is paramount. Any noise on power rails, especially in the pre-amplifier stages can result in annoying hiss in the output.

These are just a few applications where an active transistor capacitance multiplier circuit can be used to reduce noise levels and improve the power rail performance.

Basic capacitance multiplier circuit

The basic capacitance multiplier circuit is essentially a simple emitter follower with a capacitor on the base and a feed resistor from the input to the base to turn the transistor on. A capacitor from the base to ground provides the smoothing.

The circuit of a transistor capacitance multiplier showing the series pass transistor, capacitor on the base and bias resistor from the collector to the base.
Transistor capacitance multiplier circuit

The capacitance multiplier circuit operation is quite straightforward. It acts as a simple emitter follower. The resistor R1 provides bias for the base emitter junction, and the capacitor provides smoothing. This considerably reduces the levels on noise on the output, i.e. Vout.

The effect of placing the transistor in the circuit is that it effectively multiplies the capacitance on the base by the current gain of the transistor, i.e. by β

The capacitance multiplier circuit is not a voltage regulator. The output voltage varies directly with the input Vin as there is no voltage reference. Generally the output voltage is about 0.65V less than the base voltage, and around 2 - 3 V less than Vin when a load is applied.

The ripple and noise levels on the output can be reduced to very low levels> Increasing the values of R1 and C1 reduce the output ripple, and increasingly at low frequencies. On the downside large values of R1 and C1 cause the output to rise slowly towards the required value after turn on, because of the large time constant of R1 and C1.

Modified capacitance multiplier

The drawback of the circuit is that in its basic form, there is very little voltage drop across the series pass transistor, and noise reduction is not as high as it may be. To overcome this, some people place a resistor across the capacitor and this provides a potential divider reducing the voltage at the base and increasing the voltage drop across the transistor. This enables it to provide better noise reduction, although it does increase power dissipation and reduces the voltage at Vout.

The circuit of a transistor capacitance multiplier showing the series pass transistor, capacitor on the base and bias resistor from the collector to the base. This circuit also includes an additional resistor to provide additional voltage drop across the transistor for improved smoothing.
Transistor capacitance multiplier circuit with potential divider

This version of the capacitance multiplier circuit includes an additional resistor from the base to ground to reduce the base voltage and provide additional voltage drop across the transistor for improved smoothing. This is more important when the levels of ripple are higher.

Typically the voltage through the potential divider should be sufficient to maintain the base voltage sufficiently. A judgement can be made regarding the level of current though the potential divider, but often in these types of circuits it may be ten times the base current. This would ensure that the emitter voltage is maintained over a wide range of output current levels.

Op-amp capacitance multiplier

Although transistors are easy to use in capacitance multiplier circuits, it is also possible to use operational amplifiers. Here the enormous gain these circuits offer can be used to good effect, although the gain bandwidth product needs to be take into account when the circuits offer high gain levels.

An easy circuit using an operational amplifier is given below.

The circuit of a op-amp capacitance multiplier showing the two gain controlling resistors, R1 and R2 so that C = C1 * R1 / R2.
Transistor capacitance multiplier circuit with potential divider

In this circuit, the capacitance of capacitor C1 is multiplied by the ratio of resistances, i.e. the circuit gain and the effective capacitance C = C1 * R1 / R2.

When using this circuit, care must be taken not to exceed the current capability for the op-amp. This should not be an issue with low current applications, but where higher currents are required, this must be taken into account.

By Ian Poole

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