12 Jun 2012

Toshiba unveils support for latest Universal Flash Storage

Toshiba Electronics Europe has unveiled the world’s first demonstration system to support version 1.1 of the JEDEC Universal Flash Storage (UFS) standard.

The demonstration is a complete testing environment for next-generation memory solutions built around the latest UFS specification. It includes a UFS memory device, UFS host controller IP and UFS software drivers.

The result is a prototyping and testing system that Toshiba claims will speed up UFS designs, enable interoperability and ensure smooth integration with host processors.

New and emerging mobile devices demand higher performances with lower power consumption and reduced pin-counts for embedded flash memory storage. To support these demands designers need to provide performance at much lower energy-per-bit ratios and enable multi task OS support.

To help designers address these challenges specifying and designing dual-simplex serial interfaces based on MIPI UniPro and M-PHY is crucial. Toshiba's latest implementation of such an interface uses the upcoming MIPI UniPro version 1.41 and MIPI M-PHY version 2.0 Specifications.

In addition the company has established a full eco-system of device and host controllers - as well as IP for key building blocks - that provides the market with a complete environment that supports development, inter-operability and deployment using the new interface standards.

UFS is designed to be the most advanced specification for embedded flash memory-based storage in mobile devices such as smart phones and tablet computers. The UFS standard represents an evolutionary progression of JEDEC standards in this field, and has been specifically tailored for mobile applications and computing systems requiring high performance and low power consumption.

The initial data throughput for UFS will be 300 megabytes per second (MB/s), and the standard also supports command queuing features to raise random read/write speeds.

To achieve the highest performance and most power efficient data transport, UFS uses the leading industry interface standards to form its Interconnect Layer: MIPI Alliance’s M-PHYSM and UniProSM specifications.

UniPro is a comprehensive specification meant to act as a universal chip-to-chip protocol, providing a common tunnel for other protocols. The M-PHY interface is designed as the primary physical interface (PHY layer) for the UniPro specification, and is a high speed serial interface targeting up to 2.9 gigabits per second (Gbps) per lane with up-scalability to 5.8Gbps per lane.

The UFS standard adopts the well-known SCSI Architecture Model and command protocols supporting multiple commands with command queuing features and enabling a multi-thread programming paradigm. This differs from conventional flash-based memory cards and embedded flash solutions which process one command at a time, limiting random read/write access performance.

In addition, a forthcoming complementary UFS Host Controller Interface (HCI) specification will allow system designers greater flexibility by simplifying the involvement of the host processor in the operation of the flash storage subsystem. The UFS HCI specification and the adoption of SCSI will provide a well-known software programming model and enable wider market adoption.

Work on UFS is coordinated by JEDEC's JC-64 Committee for Embedded Memory Storage and Removable Memory Cards, and is supported by principal consumer electronic and cell phone OEMs.

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