01 Jun 2017

Widest bandwidth & lowest phase noise for high-speed systems

Texas Instruments has introduced an analog-to-digital converter (ADC) and phase-locked loop (PLL) with an integrated voltage-controlled oscillator (VCO) that deliver the widest bandwidth, lowest phase noise and highest dynamic range available.

The wideband ADC12DJ3200 is the fastest 12-bit ADC, delivering speeds up to 6.4 GSPS. The LMX2594 is the industry’s first wideband PLL solution to generate frequencies of up to 15 GHz without using an internal frequency doubler.

High-density phased-array radar systems, 5G systems and satellite communications demand increased data throughput, higher bandwidth and lower power, all in smaller a footprint. A multi-node synchronization reference design demonstrates how the ADC12DJ3200 and LMX2594 provide accurate, time-stable synchronization for multi-node sampling systems including large-scale phased-array radars, digital storage oscilloscopes (DSOs) and 5G wireless testers. The reference design showcases the LMX2594’s SYSREF forwarding feature and the ADC12DJ3200’s aperture delay adjust, time stamp and calibration features to improve accuracy and ease system design.

Next-generation architectures can take advantage of the ADC12DJ3200 ADC with the following features and benefits:

  • Widest signal bandwidth: Featuring the fastest sample rate of 6.4 GSPS at a 12-bit resolution –18 percent faster than competitive devices – the ADC12DJ3200 enables designers to capture the widest bandwidth possible to process more information instantaneously.

  • Highest analog input-frequency range: With direct radio-frequency (RF) sampling up to 10 GHz covering the L-band, S-band and C-band and extending into the X-band, the ADC12DJ3200 enables simplified system architectures and provides enhanced frequency agility, while reducing filter complexity, in turn save board space and component count.

  • Saves space: The 10-mm-by-10-mm device integrates an entire RF-to-bits receiver, reducing board space by up to 88 percent compared to competing solutions while enabling designers to reduce cost by simplifying the system architecture.

  • Low power: Consuming as little as 3 W, the ADC provides twice the input frequency range at half the power of competing devices.

The LMX2594 RF PLL with VCO offers the following features and benefits to make it easier for engineers to design a high-frequency RF signal chain:

  • Best noise performance: The LMX2594 features the lowest normalized PLL noise floor of -236 dBc/Hz and 1/f of -129 dBc/Hz, enabling designers to improve radio sensitivity and spectral resolution.

  • Design simplicity: The integrated VCO operates at up to 15 GHz, eliminating the need for expensive, complex on-board filters to remove subharmonics. The LMX2594 also automatically generates a frequency ramp, eliminating up to five devices typically required to perform this function for radar applications and enabling compact solutions.

  • Phase synchronization: System designers can easily synchronize the output of all on-board PLLs, saving design time for implementing multiple-input/multiple-output (MIMO), beamforming in their applications.

  • JESD204B support: The LMX2594 enables simultaneous generation of gigahertz frequency sampling and JESD204B SYSREF timing signals.

The new ADC and PLL with VCO expand TI’s portfolios of RF sampling data converters and wideband clock and timing devices. Complete a JESD204B-compliant design with the ADC12DJ3200 and LMX2594 to simplify clocking architecture, synchronization and data capture.

The ADC comes in a flip-chip ball-grid array (FCBGA) package. The LMX2594 is fully orderable and comes in a very thin quad flat no-lead (VQFN) package.

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Display Readability –resolution and viewing angle Mike Logan | AndersDX
Display Readability: resolution and viewing angle
Mike Logan, Display and Input Technology Manager at andersDX, specialists in the design, development and supply of embedded and LCD/OLED display solutions. He continues his blog series on display selection.

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