Digital PLL Frequency Synthesizer
- the digital PLL frequency synthesizer uses a programmable digital divider placed into the phase locked loop to provide a means of changing the VCO frequency
The digital PLL frequency synthesizer is possibly the most widely used form of frequency synthesizer.
As the name digital frequency synthesizer implies, this technique uses digital technology.
By placing a digital divider in the phase locked loop, the voltage controlled oscillator, VCO, is able to run at a higher frequency than that of the phase detector.
This technique enables a programmable divider to be used and this allows digital control of the frequency of the VCO by changing the division ratio.
Digital synthesizer basics
The way in which a digital divider is added to the frequency synthesizer loop can be seen in the diagram below.
Basic digital frequency synthesizer
Programmable dividers or counters are used in many areas of electronics, including many radio frequency applications. They take in a pulse train like that below, and give out a slower train. In a divide by two circuit only one pulse is given out for every two that are fed in and so forth. Some are fixed, having only one division ratio. Others are programmable and digital or logic information can be fed into them to set the division ratio.
Operation of a programmable divider
When the divider is added into the circuit the phase locked loop, PLL, still tries to reduce the phase difference between the two signals entering the phase comparator. Again when the circuit is in lock both signals entering the comparator are exactly the same in frequency. For this to be true the voltage controlled oscillator must be running at a frequency equal to the phase comparison frequency times the division ratio.
It can be seen that if the division ratio is altered by one, then the voltage controlled oscillator will have to change to the next multiple of the reference frequency. This means that the step frequency of the synthesizer is equal to the frequency entering the comparator.
Frequency step increments
It can be seen from the operation of the basic digital frequency synthesizer, that the output frequency is 'n' times the phase comparison frequency, where 'n' is the division ration. Changing the division ratio by one is the smallest frequency change that can be made.
As a result it can be seen that the smallest frequency change that can be made is equal to the comparison frequency, i.e. the phase detector frequency. In the basic format for the digital frequency synthesizer, this is equal to the reference frequency.
Most synthesizers need to be able to step in much smaller increments if they are to be of any use. This means that the comparison frequency must be reduced. This is usually accomplished by running the reference oscillator at a frequency of a MegaHertz or so, and then dividing this signal down to the required frequency using a fixed divider. In this way a low comparison frequency can be achieved.
Digital frequency synthesizer with low phase comparison frequency
Using a frequency divider after the reference generator enables the low phase comparison frequency while allowing the reference oscillator to run at a convenient frequency, often around 10 MHz. Using frequencies in this broad region is better for a number of reasons: much lower frequencies require larger crystals, and there are other performance issues.
By Ian Poole
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