Red Bar
Navigation:: Home >> Cellular telecoms >> Page 1 of 1

23 Jul 2012

Highly Reconfigurable Transceiver for Next-Generation Mobile Platforms

Jan Provoost, and Joris Van Driessche from the research organisation imec look at possible highly configurable next generation mobile or cellular phone platforms

Future mobile systems are evolving towards more and more flexibility. At their heart will be a completely reconfigurable software-defined radio (SDR) implemented in full digital CMOS. Imec, one of Europe’s premier research centres in nanotechnology is exploring and developing such SDR platforms.

Our current state-of-the-art is embodied in SCALDIO-2, a SAW-less reconfigurable radio transceiver. SCALDIO-2 can adapt itself on the fly to communicate through all key broadband communication standards including 3GPP-LTE, LTE advanced, digital broadcasting and Wifi. Thanks to its unique architecture the requirements of antenna filters are relaxed, resulting in a significantly reduced bill-of-materials and board space, and hence cost of these mobile systems.

Reconfigurable radios for more flexibility and performance The development of future wireless radios will be driven by increasingly sophisticated user demands and ever more and complex communication standards.

The technology behind current mobile handsets will not be able to cope with these developments indefinitely. Today’s advanced smart phones already support an increasing number of standards. But they do so mostly by assembling dedicated ICs on ultra-dense PCBs. This seriously increases the component count and cost, which puts a limit on how much flexibility can be incorporated. So with current technology, a number of concurrent factors (e.g., battery life, cost, performance, size, weight, complexity) do not allow the flexibility and performance needed in future applications and networks. Therefore, we envisage that the radio chips will evolve towards more and more flexibility. At the heart of future mobile systems will be a completely reconfigurable software-defined radio (SDR) platform implemented in full digital CMOS. The advent of 3GPP-LTE is already bringing us closer to this vision.

SDR Radio Chip

This standard is inherently so flexible that its most economical implementation is a single radio chip that is reconfigurable.

Admittedly, the original concept of a software radio proposed by J. Mitola [1] remains unrealistic for battery-powered devices. Such a concept would feature a high dynamic range analogue-to-digital converter (ADC) able to concurrently receive any possible frequency channel directly at the antenna. There is, however, a more pragmatic approach to SDRs. Think of a radio that supports the reception/transmission of several standards, one at a time, and that has a wide range of performance parameters that are tunable through software. Such a radio would already have significant advantages compared to using a bunch of dedicated ICs. Think of universal receive/transmit capabilities, considerable energy savings, and a lower bill-of-material.

This is the type of SDR-device that imec, one of Europe’s premier research centres in nanotechnology, has been working on for the past few years. Together with leading companies in wireless technology, we have developed SCALDIO, a highly reconfigurable radio transceiver. Now in its second generation, SCALDIO-2 supports all key broadband communication standards. In addition, it has the performance, flexibility and cost-efficiency to be at the heart of next-generation mobile platforms.

Our SDR vision for the near to mid-term In our vision, a mobile terminal will have a radio that can transform itself according to the requirements of any desired communication protocol. At the same time, its power consumption remains within the limits of what’s acceptable. It includes added intelligence to guarantee an advanced quality-of-service and the best power/performance trade-offs at any time. This is best done in a cross-layer approach: To measure the performance, the radio needs to take into account the characteristics of the protocol stack. And to optimize the power consumption, it has to have access to detailed knowledge on the low-level radio hardware.

Such a radio will consist of multiple multi-band front-end modules, possibly leveraging heterogeneous and 3D integration technologies. At the heart of the platform sits a digitally-assisted reconfigurable analog front-end and a reconfigurable base-band, both integrated in deeply scaled digital CMOS technology.

SDR Block Schematic

Figure 1 Possible instantiation of an SDR platform including 4 coexisting SDR front-ends

The flexibility offered by such a platform can be almost limitless. The system can connect to any possible protocol (cellular, connectivity, broadcast, etc.), if needed even in multiple-input multiple-output (MIMO) mode. The average power consumption is optimized through the energy-awareness capabilities. These use the reconfigurability of the radio to operate in a just-good-enough mode with respect to noise, linearity, filtering, output power, and so on. And last, such an SDR would also be capable of upgrading itself, by downloading new configurations that allow it to work in new operating modes compatible with new upcoming standards.

Next, and with a view on today’s needs, we have to take into account which communication standards should be supported. These include, of course, the cellular (2G/3G/3GPP-LTE, LTE Advanced) and connectivity standards (WLAN, Bluetooth), but also positioning (GPS) and digital broadcasting (DVB-H). So we target both frequency-division duplex (FDD) and time-division duplex (TDD) systems. And the range of carrier frequencies goes up to 6 GHz, and bandwidths must be scalable from 200kHz to 40MHz.

With these requirements, our next goal is to use as much as possible all the advantages offered by deeply-scaled (sub-)40nm digital CMOS. These include cost, speed, chip area, and energy efficiency.

SCALDIO-2, the second generation of flexibility There are a number of novel digitally inspired architectures that can profit from the intrinsic speed of nanoscale CMOS and that at the same time avoid depending on the analog performance of transistors. Examples are discrete time receivers and RF-bandpass sigma-delta receiver. When working with these architectures, we see a number of promising features. However, they are as yet not mature enough for a practical SDR implementation with a good enough resolution and realistic power consumption.

So for a practical implementation, we revert to a traditional analog direct-conversion SDR in an analog-hostile 40nm LP digital CMOS technology without any analog/RF option. [2] Our implementation includes a fully reconfigurable direct-conversion receiver, transmitter, and two synthesizers. Its configuration knobs tune the power and front-end characteristics (such as the RF carrier frequency, channel bandwidth, noise figure, linearity, and filter characteristic) to the requirements of the standards that are used. SCALDIO uses mixed-signal control, calibration, and compensation techniques to relax the specifications in the analog domain.

The transceiver includes a highly linear receiver, tolerating more out-of-band blocker interference and avoiding the need of external SAW filters. With a 3dB noise figure and capable of handling a 0dBm blocker at 20MHz offset, the receiver has the highest blocker resilience for low noise figures. The fully reconfigurable receiver also achieves the highest linearity (+10dBm IIP3, +70dBm IIP2), and frequency range reported up to now and handles blockers well in any mode.

The transmitter combines adaptive out-of-band noise filtering with voltage-sampling up-conversion to achieve RX band noise down to -162dBc/Hz allowing also here SAW-less operation. SAW-less transmitters become more and more important with the evolution towards future standards such as 3GPP-LTE/LTE Advanced where transmitters will need to operate in multiple frequency division duplex (FDD) bands.

 SDR transceiver die

Figure 2 40nm SDR transceiver die (SCALDIO)

Better performance than dedicated radios With this direct-conversion radio in nano-scale CMOS, we have demonstrated that clever analog design and architectures in a digital technology can result in a performance that is equal to or better than, dedicated radios. At the same time, we have reached a large improvement in transmitter noise, linearity, and in the receiver blocker resilience, significantly reducing the antenna interface requirements and bill-of-materials. As a result, SCALDIO-2 is a cost-, performance- and power-competitive solution for next-generation wireless communication platforms.

SCALDIO-2 specifications: - RF tuning range: 100 MHz – 6GHz

  • Signal bandwidths supported: 200kHz – 40MHz

  • Digital 40nm CMOS, no analog or RF technology options

    • 1.1/2.5V supply
    • 5mm²
    • 30-100mA, depending on configuration
  • Transmitter out-of-band noise of < -160dBc/Hz at 20MHz offset from carrier frequency

  • Receiver out-of-band linearity (IIP3) of +10dBm at 20MHz offset from carrier frequency (in high gain mode)

  • Performance optimized for cellular standards (GSM, UMTS, WCDMA, 3GPP-LTE, LTE Advanced) , connectivity (WLAN 802.11a/b/g/j/n/ah) and broadcasting standards (DVB-H ...)

  • Compatible with SAW-less 3GPP-LTE/LTE Advanced

References [1] J. Mitola, “The Software Radio Architecture,” IEEE Commun. Mag., vol. 33, no. 5, May 1995, pp. 26–38.

[2] J. Craninckx, J. Borremans, and M. Ingels, “SAW-less Software-Defined Radio Transceivers in 40nm CMOS,” Custom IC Conf., paper 4.1, Sept. 2011.



Jan Provoost is science editor at imec, writing articles about technology and innovation for the global media. Jan obtained his M.A. in languages in 1989 and his M.Sc. in information science in 1993, both from the Catholic University of Leuven, Belgium.

Joris Van Driessche received his M.Sc. degree in Electrical Engineering from the University of Ghent in 2001. He joined imec in 2001 as an RF front-end architecture research engineer with a main focus on system specification and architecture definition of multi-standard RF transceivers. He is currently Program Manager for R&D activities on reconfigurable radio transceivers focusing on challenges for next generation wireless communication in nanoscale CMOS technologies.

Based in Belgium, Imec performs world-leading research in nano-electronics and nano-technology. Its staff of close to 2,000 people includes over 600 industrial residents and guest researchers. Imec’s research is applied in better healthcare, smart electronics, sustainable energy, and safer transport.

Page 1 of 1


Most popular articles in Cellular telecoms

Drive Testing: Challenges on the Road Ahead
Carrier Aggregation – How to Test the Key Enabler for LTE Advanced
Current VoLTE Development and Deployment
Envelope Tracking Technology for 4G Smartphones
2013 Cellular / Mobile Technology Trends