16 May 2015

RS-485 Transceivers Design Tutorial

Jeff Lies, Applications Engineer, Precision Products, Intersil Corporation looks how to design circuits for the RS485 & RS422 serial data communications standards.

TIA/EIA-485 and TIA/EIA-422 (also known as RS-485 and RS-422) are wired communication standards published by the Telecommunications Industry Association/Electronic Industries Alliance (TIA/EIA).

They use differential signalling to enable data transmission over long distances and in noisy industrial and factory automation environments.

Differential signalling rejects common mode noise, and the recommended twisted pair cable ensures that most received interference is common mode. Long transmission distances increase the chance for ground potential differences, but the standards’ wide common mode range (CMR) ensures that the network operates properly, even in the presence of fairly large common mode voltages. As shown in Figure 1, the transmitter (Tx) and receiver (Rx) both have non-inverting (Y and A) and inverting (Z and B) pins.

Half-duplex devices are used for bidirectional communication over a single cable, so the corresponding Rx and Tx terminals connect to the same IC package pin. Networks that utilize two cables for bidirectional communication employ full duplex devices, where the Rx and Tx terminals connect to separate pins.

Picking a cost effective device

With the plethora of transceivers on the market, it can be challenging to pick the best, most cost effective device for your application. This two-part article guides you through the choices and weighs key design considerations to help you pick the right transceiver.

This article reviews the most typical RS-485 ICs and explores the most common design considerations.

Pre-compliance EMC chamber arrives

Figure 1: Typical RS-485 and RS-422 pinouts

RS-485 Requirements

The published RS-485 standard is 14 pages long, but here are some of its most important requirements

  • Differential signalling with a very sensitive (±200mV) Rx, and a healthy ±1.5V Tx differential output voltage (VOD). This combination ensures a robust noise margin that tolerates the attenuation from long cables.

  • The Tx must have an enable pin. RS-485 allows multiple drivers on the bus for true bidirectional transmission over a single cable, so each Tx must have tri-state output capability.

  • High Tx output current to drive double terminated cables and long cables. High-speed bidirectional transmission over a single cable requires two terminations.

  • Wide CMR of at least -7V to +12V. RS-485 enables networks up to 4000 feet long (1220m). A large CMR handles the ground potential differences that may occur over long distances, and tolerates larger induced bus voltages in noisy environments. This CMR also allows devices with different supply voltages to communicate on the same bus.

  • A receiver input resistance of approximately 12kΩ. The standard allows up to 32 “one unit load” devices on the bus, and the load from each device (Tx or Rx) must be ≤ 1mA with a 12V bias on the bus.

RS-422 vs. RS-485

RS-422 is very similar to RS-485, however RS-422 allows only one Tx on the bus, with a max of ten Rx. This single Tx multiple Rx configuration is called a multi-drop, or broadcast, network. The one driver limitation eliminates the need for a Tx enable pin, which reduces the termination requirement to one 120Ω resistor, and necessitates the use of full-duplex transceivers, or separate Rx and Tx ICs. RS-422 is a much simpler network than the RS-485 network.

The RS-485 Receiver (Rx)

A standard RS-485 Rx recognizes any differential voltage (Pin A – Pin B) > +200mV as a logic 1, and any differential voltage below -200mV as a logic 0, and these input thresholds must be met over a wide CMR of -7V to +12V. Any Rx input voltage between -200mV and +200mV (e.g., a 0V differential) is indeterminate. The large delta between the driver’s ±1.5V differential output voltage (VOD) and the receiver’s ±200mV threshold yields good noise immunity and the ability to handle the attenuation from long cables. The standard allows 32 unit loads (UL) on a bus, where 1 UL is specified as a device drawing no more than 1mA with the bus at +12v relative to GND.

The RS-485 Transmitter (Tx)

The standard RS-485 Tx is a driver, with differential outputs, that is specified to deliver at least a 1.5V differential voltage (VOD) into a 54Ω differential load. The 54Ω load is derived from the maximum allowed two 120Ω termination resistors in parallel with 32, 1UL receivers. RS-485 families typically include drivers with output slew rates set to accommodate two to three data rates. Using the proper slew rate limited device for slower data rate applications minimizes electromagnetic interference (EMI), and reduces the impact from imperfect transmission line matching and termination.

Basic RS-485 Transceivers

Short, simple, low-node-count networks can often use low-cost RS-485 transceivers. Short networks won’t pick up much common mode voltage (CMV), so they don’t need more than the RS-485 standard CMR, nor should they need over voltage protection (OVP). Simple networks with ≤ 32 nodes don’t require fractional unit load devices, and if the cables aren’t frequently connected and disconnected, then electrostatic discharge (ESD) protection may not be required. Nevertheless, some basic devices do include ±8kV to ±15kV human body model ESD protection. RS-422 networks have a single, always enabled driver, so the bus is constantly driven, and bus biasing isn’t required. If the bus is electrically short, meaning it doesn’t need to be treated as a transmission line, or if the data rate is very slow, then bus terminations may not be required, and basic RS-485 transceivers work fine. However, problems may arise when terminations are required for multi-driver RS-485 systems.

Consider what happens in the circuit shown in Figure 2 when the bus is idle (no Tx actively driving the bus) as occurs when switching between Tx on the bus. With all Tx on the bus tri-stated, the differential termination resistor(s) collapse the bus voltage to nearly a 0V differential, which as previously described is an indeterminate voltage level. Presented with this voltage on the bus, an individual Rx may drive its output (Ro) to a 1, or to a 0, or worse yet it might oscillate. This is problematic because the microcontroller (µC) monitoring Ro might interpret any high to low transition as a message “start-bit,” and an oscillating Ro wastes valuable µC bandwidth as it tries to service an endless stream of phantom messages.

Pre-compliance EMC chamber arrives

Figure 2: Terminated multi-driver bus

The classical solution to the collapsing bus problem was to add bus biasing resistors as shown in Figure 3. The pull-up and pull-down resistors bias the differential bus voltage to a positive few hundred mV, which properly preserves a logic 1 level when the bus is idle. Unfortunately, this approach complicates the design task by requiring a tradeoff between the bus idle voltage for noise immunity and Tx loading, and adds a DC current path from Vcc to GND. To get the minimum (zero noise margin) +200mV DC bias voltage across 60Ω (two parallel termination resistors) requires 3.33mA. With a 3.3V supply, the bias resistors needed to generate this current are each 470Ω, which is a pretty substantial load. This added Tx load may significantly reduce the number of transceivers allowed on the bus.

Pre-compliance EMC chamber arrives

Figure 3: Bus biasing fixes idle problem, but introduces new issues.

Newer, “full featured” RS-485 transceivers solve this problem by including a special failsafe function.

Full Featured RS-485 Transceivers

Newer RS-485 ICs are “full featured” transceivers that include an advanced Rx failsafe function, fractional unit loads, and improved ESD resistance.

Examples include the ISL317XE transceiver family from Intersil, which services 3.3V applications, and the ISL315XE family targeted for 5V applications.

Full failsafe (FFS) Rx

Although not a part of the RS-485 standard, one of the most important features added to RS-485 transceivers in the last two decades is the receiver full failsafe (FFS) function. FFS means that the Rx drives its output to a defined state (usually a logic 1) whenever the Rx inputs are floating, shorted together, or un-driven and shorted by a termination resistor. As mentioned previously, this last condition occurs whenever a terminated, multi-Tx bus is not actively driven.

The advent of the FFS Rx solved the collapsing bus problem by redefining the Rx input threshold. By changing the Rx input high threshold to a slightly negative differential voltage (typically -20mV to -50mV), the Rx now recognizes a 0V differential as a valid high input level. This change is still RS-485 compliant, because any voltage > +200mV is still recognized as a high level, and the negative Rx threshold remains unchanged. The FFS Rx eliminates the need for bus biasing, which allows the bus to be loaded with the maximum number of transceivers.

There are two disadvantages that can arise from using a FFS Rx. First, since the input threshold switching region has been cut in half – from 400mV to approximately 200mV – it is difficult to design much hysteresis into the Rx inputs. Thus, FFS Rx hysteresis runs about 20-40mV, while a non-FFS Rx may have ≥ 70mV, so a FFS Rx has less noise immunity than a standard Rx. Second, the asymmetrical FFS switching points may cause duty cycle distortion on networks with slow bus transitions.

Fractional unit loads

As network node counts grew past 32, users of standard RS-485 devices had to add repeaters to break the network into 32 UL node segments.

Full featured families solve this problem by implementing an Rx with a higher input resistance, which allows more devices on the bus while still complying with the RS-485 32mA maximum load current requirement. 1/4th UL devices have input currents ≤ 250µA, so 128 transceivers (128*250µA = 32mA) are allowed on the bus. 1/8th UL devices have input currents ≤ 125µA, so you can have 256 devices on a bus.

Disabled Tx load currents are usually negligible, so the Rx input resistance dominates the load calculation. The unit load concept is strictly a DC load constraint, so AC considerations (e.g., length of cable, spacing of nodes, or capacitance of nodes) may limit the node count to values less than what the UL allows.

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About the author

Jeff Lies is an Applications Engineer for Precision Products at Intersil Corporation. He specialises in interface products, including RS-485 and RS-232 transceivers. Jeff holds a BSEE from U.C. Berkeley.

Intersil Corporation is a leading provider of innovative power management and precision analogue solutions. The company's products form the building blocks of increasingly intelligent, mobile and power hungry electronics, enabling advances in power management to improve efficiency and extend battery life. With a deep portfolio of intellectual property and a rich history of design and process innovation, Intersil is the trusted partner to leading companies in some of the world's largest markets, including industrial and infrastructure, mobile computing, automotive and aerospace.

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